There are a large number of different techniques for converting a continuously variable analog voltage into a quantized digital (e.g., binary) value. In most types of analog to digital converters, the full scale range of the analog input signal is quantized into one of 2n potential of binary values, where n is the number of bits at the output of the analog to digital converter.
U.S. Pat. No. 6,822,596 discloses an analog to digital converter that first converts an input analog voltage into n different pulse trains, each having a phase angle that is dictated by the input analog voltage, where 2n is the resolution of the converter (i.e., there are 2n possible digital output values). All 2n input pulse trains have the same phase. The device further converts 2n different reference voltages into 2n reference pulse trains, each reference pulse train having a different phase angle. Each of the 2n input pulse trains is compared to one of the 2n reference pulse trains in one of 2n comparators. The outputs of the 2n comparators are supplied to 2n flip flops. In accordance with this scheme, x flips flops will output a first binary value (e.g., 0) and y flip flops will output a second binary value (e.g., 1), where x+y=2n. More particularly, the outputs of the x flip flops for which the phase angle of the input pulse train lags the phase angle of the corresponding reference pulse train will output a first value (e.g., 0), while the y flip flops for which the phase angle of the input pulse train leads the phase angle of the corresponding reference pulse train output a second value (e.g., 1). The outputs of the 2n flip flops are provided to a decoder that converts the 2n outputs to an n bit binary code. Such decoders are well known and commonly used in flash converters and the like. They often are constructed of relatively simple and fast combinatorial logic components.